DocumentCode
2837267
Title
Parallel Architecture of Motion Estimation for Video Format Conversion with Center-Biased Diamond Search
Author
Ding, Yong ; Yan, Xiao-Lang
Author_Institution
Inst. of VLSI Design, Zhejiang Univ., Hangzhou, China
fYear
2009
fDate
19-20 Dec. 2009
Firstpage
1
Lastpage
4
Abstract
Motion compensated interpolation is the best algorithm among the methods of video format conversion. However, the accuracy and reliability of the motion vectors have a significant impact on the performance of interpolation. To deal with this problem, a novel motion estimation algorithm with center-biased diamond search and its parallel VLSI architecture are proposed in this paper. Experiments show that it works better than conventional motion estimation algorithms in terms of motion compensation error and robustness, and its architecture overcomes the irregular data flow and achieves high efficiency. It also successively reuses data and reduces the control overhead. So it is highly suitable for HDTV applications.
Keywords
VLSI; interpolation; logic design; motion compensation; motion estimation; parallel architectures; video signal processing; HDTV application; center-biased diamond search; irregular data flow; motion compensated interpolation; motion compensation error; motion estimation; motion vector; parallel VLSI architecture; parallel architecture; video format conversion; Algorithm design and analysis; HDTV; Image converters; Interpolation; Motion compensation; Motion estimation; Parallel architectures; Robustness; Very large scale integration; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Engineering and Computer Science, 2009. ICIECS 2009. International Conference on
Conference_Location
Wuhan
Print_ISBN
978-1-4244-4994-1
Type
conf
DOI
10.1109/ICIECS.2009.5364517
Filename
5364517
Link To Document