DocumentCode :
2837439
Title :
Efficient Sequential Architecture for the AES CCM Mode in the 802.16e Standard
Author :
Ji, Jae Deok ; Jung, Seok Won ; Jun, Eun-A ; Lim, Jongim
Author_Institution :
Public Security Div., Korea Internet & Security Agency, Seoul, South Korea
fYear :
2009
fDate :
1-3 Nov. 2009
Firstpage :
253
Lastpage :
256
Abstract :
We propose hardware architecture of the advanced encryption standard counter with the cipher block chaining-message authentication code (AES CCM) in the 802.16e standard. It has only one AES encryption core with composite field logic for SBOX. The logic is divided into two parts to perform one round at two clock cycles. In the proposed architecture, the counter (CTR) and the cipher block chaining-message authentication code (CBC-MAC) operations are processed in a sequential mode and share one AES encryption resource at the same time. The throughput of our design is about 588 Mbps at 105 MHz frequency with reasonable area requirements.
Keywords :
cryptography; logic circuits; message authentication; wireless LAN; 802.16e standard; AES CCM mode; AES encryption core; AES encryption resource; SBOX; advanced encryption standard counter; cipher block chaining-message authentication code operations; composite field logic; frequency 105 MHz; hardware architecture; sequential architecture; sequential mode; Authentication; Code standards; Counting circuits; Cryptography; Hardware; Information security; Intelligent networks; Logic arrays; National security; Throughput; 802.16e; AES CCM; FPGA; SBOX composite logic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent Networks and Intelligent Systems, 2009. ICINIS '09. Second International Conference on
Conference_Location :
Tianjin
Print_ISBN :
978-1-4244-5557-7
Electronic_ISBN :
978-0-7695-3852-5
Type :
conf
DOI :
10.1109/ICINIS.2009.71
Filename :
5364531
Link To Document :
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