An optimal design for parallel testing

An integer linear programming (ILP) model is presented for the design of optimal parallel testing, which minimizes the index number of the maximal complete subgraph (MCS) in the parallel testing graph (PTG), therefore, making the index coloring number of the PTG minimal. The whole test time of a partitioned circuit is thus minimal. An optimal testing scheduling algorithm of a partitioned circuit is also presented in polynomial time. An existent ILP program is used to prove the correctness of this model. Sufficient experimental results corresponding to this ILP model are offered