DocumentCode
283827
Title
Generation of test sequences for current testing
Author
Miura, Yukiya ; Wada, Yasushi ; Kinoshita, Kozo
Author_Institution
Dept. of Appl. Phys., Osaka Univ., Japan
fYear
1991
fDate
26-27 Sep 1991
Firstpage
200
Lastpage
205
Abstract
In current testing, measuring the current with a rapid clock rate is a difficult problem, because a CMOS circuit causes a dynamic current. To overcome this problem, a testing circuit which measures the current, including the dynamic current, is proposed. Moreover, the authors describe a test generation method which generates suitable test sequences for proposed circuit. Generated test sequences have the property that almost the same number of transitions occurs between each two consecutive vectors. Finally, they show some experimental results on the test generation of this method
Keywords
CMOS integrated circuits; integrated circuit testing; integrated logic circuits; logic testing; CMOS circuit; current testing; dynamic current; test generation method; test sequences; CMOS technology; Circuit faults; Circuit testing; Clocks; Current measurement; Electrical fault detection; Fault detection; Integrated circuit testing; Power supplies; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Fault Tolerant Systems, 1991. Proceedings., Pacific Rim International Symposium on
Conference_Location
Kawasaki
Print_ISBN
0-8186-2275-X
Type
conf
DOI
10.1109/{RFTS.1991.212945
Filename
212945
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