DocumentCode :
283839
Title :
Fault tolerant multi-processor communication systems using bank memory switching
Author :
Tanaka, Norihiko ; Kurokawa, Takakazu ; Koga, Yoshiaki
Author_Institution :
Dept. of Comput. Sci., Nat. Defense Acad., Yokosuka, Japan
fYear :
1991
fDate :
26-27 Sep 1991
Firstpage :
188
Lastpage :
193
Abstract :
The paper proposes a new fault tolerant communication scheme for real-time operations and three new interconnection networks to construct a fault tolerant multi-processor system for pipeline processings. The proposed communication scheme using bank memory switching technique has an advantage to make a fault tolerant pipeline system so that it can detect any failure caused in a processing element of the system. In addition, it can overcome conventional problems caused in interconnection circuits to data flow with one direction such as a pipeline processing
Keywords :
fault tolerant computing; multiprocessor interconnection networks; pipeline processing; real-time systems; bank memory switching; communication scheme; fault tolerant communication scheme; interconnection networks; pipeline processings; real-time operations; Buffer storage; Communication switching; Data flow computing; Fault tolerance; Fault tolerant systems; High performance computing; Integrated circuit interconnections; Multiprocessor interconnection networks; Pipeline processing; Read-write memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Fault Tolerant Systems, 1991. Proceedings., Pacific Rim International Symposium on
Conference_Location :
Kawasaki
Print_ISBN :
0-8186-2275-X
Type :
conf
DOI :
10.1109/{RFTS.1991.212958
Filename :
212958
Link To Document :
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