On fault tolerance of reconfigurable arrays using spare processors

Addresses fault tolerance of a processor array that is reconfigurable by replacing faulty processors with spare processors. The fault tolerance of such a reconfigurable processor array depends on not only an algorithm for spare processor assignment but also an organization of spare processors in the reconfigurable array. The paper discusses a relationship between fault tolerance of reconfigurable arrays and their organizations of spare processors with respect to the smallest number of faulty processors for which the reconfigurable array cannot be failure-free as a processor array system no matter what reconfiguration is used. An optimum n×n reconfigurable array using 2n spare processors is presented