Fast sequential ATPG based on implicit state enumeration

The knowledge of the State Transition Graph (STG) of a sequential circuit helps in generating test sequences. For instance, by determining that a set of states is not reachable from the reset state, it is possible to identify a certain type of sequentially untestable faults. However, until recently, the ability of algorithms to store the STG of a sequential circuit has been limited to small instances. Recent advances in sequential circuit verification, based on the use of binary decision diagrams and new powerful implicit enumeration algorithms, have dramatically improved our ability to deal with large numbers of states. In this paper we report on the application of these algorithms to the problems of generating justification sequences, identifying redundancies, and dealing with hard-to-detect faults. Our experiments show substantial improvements over previously published results.