• DocumentCode
    2839729
  • Title

    Active body-biasing control technique for bootstrap pass-transistor logic on PD-SOI at 0.5V-VDD

  • Author

    Iijima, M. ; Kitamura, M. ; Hamada, K. ; Fukuoka, K. ; Numa, M. ; Tada, A. ; Maegawa, S.

  • Author_Institution
    Kobe Univ., Japan
  • fYear
    2005
  • fDate
    3-6 Oct. 2005
  • Firstpage
    50
  • Lastpage
    51
  • Abstract
    In this paper, we propose an active body-biasing controlled (ABC)-bootstrap PTL (pass-transistor logic) on PD-SOI at 0.5 V-VDD for ultra low power design. Applying active body-biasing to bootstrap PTL is the key for higher performance without output voltage loss by boosting gate voltage with coupling capacitance between source and body. Lowering Vth by body biasing also contributes for high speed operation. Experimental results have shown improvement in both delay time and power consumption.
  • Keywords
    MOSFET; bootstrap circuits; high-speed integrated circuits; logic circuits; low-power electronics; silicon-on-insulator; 0.5 V; active body biasing control; bootstrap pass-transistor logic; coupling capacitance; delay time; partially depleted SOI; ultra low power design; voltage loss; Boosting; CMOS logic circuits; CMOS technology; Capacitance; Degradation; Energy consumption; Logic design; MOS devices; MOSFETs; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI Conference, 2005. Proceedings. 2005 IEEE International
  • ISSN
    1078-621X
  • Print_ISBN
    0-7803-9212-4
  • Type

    conf

  • DOI
    10.1109/SOI.2005.1563530
  • Filename
    1563530
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2839729