Active body-biasing control technique for bootstrap pass-transistor logic on PD-SOI at 0.5V-VDD

In this paper, we propose an active body-biasing controlled (ABC)-bootstrap PTL (pass-transistor logic) on PD-SOI at 0.5 V-V_DD for ultra low power design. Applying active body-biasing to bootstrap PTL is the key for higher performance without output voltage loss by boosting gate voltage with coupling capacitance between source and body. Lowering V_th by body biasing also contributes for high speed operation. Experimental results have shown improvement in both delay time and power consumption.