DocumentCode :
2839942
Title :
Mechanism for return stack and branch history corrections under misprediction in deep pipeline design
Author :
Chiu, Guan-Ying ; Yang, Hui-Chin ; Li, Walter Yuan-Hwa ; Chung, Chung-Ping
Author_Institution :
Dept. of Comput. Sci., Nat. Chiao Tung Univ., Hsinchu
fYear :
2008
fDate :
4-6 Aug. 2008
Firstpage :
1
Lastpage :
8
Abstract :
Return stack may be popped due to branch misprediction, corrupting its contents. Meanwhile, erroneous branch history is also recorded for upcoming branch predictions. These errors are more likely in deep pipelines, and their handling affects performance seriously. We study these issues, and propose solutions with two virtues: low hardware overhead, and high branch prediction accuracy comparable with that of a shallow pipeline design. To deal with return stack corruption, any push and pop after any mispredicted branch should be counted and recorded. These simple rules get overly complicated when multiple unresolved branches exist, and anyone may be erroneous, as is common in deeper pipelines. Next, to deal with branch history contamination, extra history bits, plus a branch confirmation pointer are needed. The experiment result shows that our design is effective, about 4%~9% performance improvement in MiBench.
Keywords :
parallel architectures; pipeline processing; storage management; MiBench; branch confirmation pointer; branch history contamination; branch history correction; branch misprediction; content corruption; deep pipeline design; hardware overhead; return stack corruption; Accuracy; Algorithms; Contamination; Hardware; History; Impedance; Indexing; Pipelines; Shift registers; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Systems Architecture Conference, 2008. ACSAC 2008. 13th Asia-Pacific
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-2682-9
Electronic_ISBN :
978-1-4244-2683-6
Type :
conf
DOI :
10.1109/APCSAC.2008.4625446
Filename :
4625446
Link To Document :
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