Title :
Independent gate skewed logic in double-gate SOI technology
Author :
Cakici, Tamer ; Mahmoodi, Hamid ; Mukhopadhyay, Saibal ; Roy, Kaushik
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
Independent gate control of double gate SOI devices (D. Fried, 2003 and L. Mathew, 2004) can be effectively exploited to improve performance and reduce power in sub-50nm circuits. In this paper, we have proposed a skewed logic style using independent gate operation of double gate SOI devices.
Keywords :
logic gates; silicon-on-insulator; double gate SOI devices; double-gate SOI technology; independent gate control; skewed logic; Circuit simulation; Delay; Design engineering; Inverters; Logic devices; Logic gates; MOS devices; MOSFETs; Power engineering and energy; Power engineering computing;
Conference_Titel :
SOI Conference, 2005. Proceedings. 2005 IEEE International
Print_ISBN :
0-7803-9212-4
DOI :
10.1109/SOI.2005.1563543
