Title :
Tuning of electric artworks of printed circuit boards to reduce warpage
Author :
Hutapea, Parsaoran ; Grenestedt, Joachim L.
Author_Institution :
Dept. of Mech. Eng. & Mech., Lehigh Univ., Bethlehem, PA, USA
Abstract :
The paper deals with a tuning method to reduce warpage of Printed Circuit Boards (PCBs). There are three main processes involved in this method: calculating effective properties of PCBs with simple regular electric artworks, using three-dimensional (3D) Finite Element (FE) modeling; fitting simplified expressions to the results from these analyses; and developing two-dimensional (2D) FE models of a whole PCB, with arbitrarily complicated artwork, using the simplified expressions. These three processes were used to estimate the warpage of a production PCB. Iterative searches, or optimization, were used to change trace width, spacing, etc. in order to reduce the warpage. It was demonstrated that by slightly varying trace widths and spacings in the PCB, warpage could be reduced approximately by a factor of five.
Keywords :
circuit tuning; finite element analysis; iterative methods; printed circuit layout; printed circuit manufacture; thermal management (packaging); arbitrarily complicated artwork; effective properties; electric artworks tuning; iterative searches; printed circuit boards; thermal warpage; three-dimensional finite element modeling; two-dimensional finite element models; warpage reduction; Circuit optimization; Composite materials; Copper; Finite element methods; Fitting; Mechanical engineering; Metals industry; Predictive models; Printed circuits; Production;
Conference_Titel :
Advanced Packaging Materials: Processes, Properties and Interfaces, 2004. Proceedings. 9th International Symposium on
Print_ISBN :
0-7803-8436-9
DOI :
10.1109/ISAPM.2004.1288018
