• DocumentCode
    2840006
  • Title

    Test generation: A boundary scan implementation for module interconnect testing

  • Author

    Lefebvre, M.F.

  • fYear
    1991
  • fDate
    26-30 Oct. 1991
  • Firstpage
    88
  • Lastpage
    95
  • Abstract
    The IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture provides access to internal module networks required for mtercomect testmg in cases where physical access is lirmted or not possible. Consequently, test generation tools must be adapted to support boundary scan test techniques. This paper describes an automated test pattern generation process that has been developed for producing interconnect test data for simple and complex 1149.1 implementations.
  • Keywords
    Automatic testing; Circuit faults; Circuit testing; Fixtures; IEEE standards; Integrated circuit interconnections; Logic testing; System testing; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1991, Proceedings., International
  • Conference_Location
    Nashville, TN, USA
  • ISSN
    1089-3539
  • Print_ISBN
    0-8186-9156-5
  • Type

    conf

  • DOI
    10.1109/TEST.1991.519498
  • Filename
    519498