• DocumentCode
    2840122
  • Title

    Void free processing of flip chip on board assemblies using no-flow underfills

  • Author

    Colella, Michael ; Baldwin, Daniel

  • Author_Institution
    George W. Woodruff Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2004
  • fDate
    2004
  • Firstpage
    272
  • Lastpage
    281
  • Abstract
    A consistent problem that has plagued the introduction of innovative no-flow underfill materials into volume flip chip onboard/in-package production is voiding of the underfill during processing. In addition to outgassing voids typically due to moisture and solvents in the substrate or outgassing of the underfill, voids are produced as a result of the squeeze flow experienced by the underfill during chip placement. This paper presents a systematic development of optimal flip chip on board assembly process for no flow underfill materials presenting process parameters compatible with four commercially available no flow fluxing underfills. A novel hybrid process is developed that combines a capillary flow dynamic with no-flow fluxing underfills resulting in virtually a void free assembly process. The results of the initial studies are used to choose an optimal process for the materials. The newly developed edge patterned hybrid no-flow process has resulted in near void-free assemblies capable of passing 2000 cycles without an electrical failure for the -40 to 125°C AATC reliability test.
  • Keywords
    capillarity; chip-on-board packaging; encapsulation; flip-chip devices; integrated circuit packaging; outgassing; voids (solid); -40 to 125 degC; AATC reliability test; capillary flow dynamic; chip placement squeeze flow; edge patterned hybrid process; flip chip in-package production; flip chip on board assemblies; fluxing underfills; no-flow underfills; outgassing voids; substrate moisture; substrate solvents; underfill voiding; void free assembly process; void free processing; Assembly systems; Conducting materials; Electronic packaging thermal management; Flip chip; Integrated circuit interconnections; Laboratories; Materials testing; Mechanical engineering; System testing; Vehicles;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Packaging Materials: Processes, Properties and Interfaces, 2004. Proceedings. 9th International Symposium on
  • Print_ISBN
    0-7803-8436-9
  • Type

    conf

  • DOI
    10.1109/ISAPM.2004.1288026
  • Filename
    1288026