Sidegating effect in ion-implanted GaAs self-aligned gate MESFET MMICs

The authors present a careful study of the sidegating effect observed on GaAs MESFET MMICs. A sidegating (SG) or backgating effect sometimes occurs in IC MESFETs fabricated in SI GaAs. It manifests itself by a significant drop in drain current when a negative voltage is applied to adjacent electrodes, or to the backside of the substrate. Analysis of the experimental and simulation results indicates that the threshold electrical field is ~1-2 kV/cm in the region between the sidegate and the FET. When the negative sidegate voltage V_SG is greater than the threshold magnitude, the extra voltage will primarily drop over the channel-substrate interface (CSI). The expansion of CSI depletion reduces the channel thickness. This study suggests that the minimum spacing between sidegates and MESFET must be considered in circuit design. The geometry and material parameters or ion implant schedule should be optimized in design rules to minimize sidegating