DocumentCode
2840176
Title
New design concept of ESD protection circuits in SOI BiCDMOS LSI for automotive applications
Author
Fuwa, Hiromasa ; Hayakawa, Kiyoharu
Author_Institution
Toyota Motor Corp., Aichi, Japan
fYear
2005
fDate
3-6 Oct. 2005
Firstpage
116
Lastpage
117
Abstract
Using TLP tester and device simulation, we investigated the I-V characteristics of two devices and the behavior of the NPN in high current region. The NPN is suitable device for ESD protection circuits. Especially, collector to base space is an important design parameter. We achieved low holding voltage, low on-resistance and high failure current by optimizing collector to base space of the NPN. Therefore we propose the ESD protection using circuits that consists of the NPN automotive applications.
Keywords
BiCMOS integrated circuits; automotive electronics; electrostatic discharge; integrated circuit design; large scale integration; silicon-on-insulator; I-V characteristics; NPN behavior; SOI BiCDMOS LSI; TLP tester; automotive applications; device simulation; electrostatic discharge protection circuits; high current region; Automotive applications; Circuits; Clamps; Current measurement; Electrostatic discharge; Large scale integration; Low voltage; Protection; Silicon; Transmission line measurements;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference, 2005. Proceedings. 2005 IEEE International
ISSN
1078-621X
Print_ISBN
0-7803-9212-4
Type
conf
DOI
10.1109/SOI.2005.1563558
Filename
1563558
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