System design for a low cost PA-RISC desktop workstation

Author

Horning, R. ; Johnson, L. ; Thayer, L. ; Li, D. ; Meier, V. ; Dowdell, C. ; Roberts, D.

Author_Institution

Hewlett-Packard Co., Fort Collins, CO, USA

fYear

1991

fDate

Feb. 25 1991-March 1 1991

Firstpage

208

Lastpage

213

Abstract

A low-cost high-performance desktop workstation is described. A high-performance CMOS processor was developed with the specific goal of moving the PA-RISC architecture into the low-cost workstation market. Not only were each of the system components designed for optimal performance, but they were also designed to support the other system components. The processor added features and instructions to improve graphics performance. The memory system was optimized to minimize the effects of cache misses on the CPU performance and at the same time provide the memory to graphics bandwidth needed to support the most advanced graphics systems. Special hardware was added to the memory controller to allow low-cost 3-D graphics systems to be developed. The I/O system provides the most important industry standard I/O interfaces for low cost and high performance, and also provides an industry standard EISA bus for less common and future I/O needs.<>

Keywords

CMOS integrated circuits; computer graphic equipment; microprocessor chips; reduced instruction set computing; workstations; 3-D graphics systems; 3D graphics; CMOS processor; CPU performance; EISA bus; I/O needs; PA-RISC desktop workstation; cache misses; graphics performance; Bandwidth; CMOS process; Clocks; Coprocessors; Costs; Frequency; Graphics; Read-write memory; System buses; Workstations;

fLanguage

English

Publisher

ieee

Conference_Titel

Compcon Spring '91. Digest of Papers

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-8186-2134-6

Type

conf

DOI

10.1109/CMPCON.1991.128808

Filename

128808