Considerations for single event effects in non-planar multi-gate SOI FETs

Author

Alles, M.L. ; Ball, D.R. ; Massengill, L.W. ; Schrimpf, R.D. ; Warren, K.M. ; Weller, R.A.

Author_Institution

Inst. for Space & Defense Electron., Vanderbilt Univ., Nashville, TN, USA

fYear

2005

fDate

3-6 Oct. 2005

Firstpage

191

Lastpage

193

Abstract

Reductions in supply voltage and device dimensions, and increased transistor circuits in advanced circuits, make single event effects increasingly relevant. Non-planar multiple-gate FETs (MugFETs) are under consideration for ≤ 45 nm technology generations. In this work, we examine issues for SEE in advanced MugFETs using energy deposition and device simulations.

Keywords

MOSFET; semiconductor device models; silicon-on-insulator; MugFET; device simulations; energy deposition; nonplanar multigate SOI FET; silicon-on-insulator; single event effects; supply voltage; transistor circuits; Circuits; Computational modeling; Discrete event simulation; Doping; FETs; FinFETs; Silicon; Space technology; Transistors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 2005. Proceedings. 2005 IEEE International

ISSN

1078-621X

Print_ISBN

0-7803-9212-4

Type

conf

DOI

10.1109/SOI.2005.1563584

Filename

1563584

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2840574