The C400 superscalar/superpipelined RISC design

The C400 represents the first complete reimplementation of the CLIPPER architecture since Fairchild introduced the original C100 version in 1985. The design incorporates an entirely new pipeline structure that exploits instruction-level parallelism far more than its predecessors, and provides far greater computational performance than earlier CLIPPERs, in both absolute and frequency-adjusted comparisons. The combination of superscalar dispatch and deep floating-point pipelines provides architectural headroom that permits performance enhancements over the life of the implementation architecture. The C400´s design goals, constraints, and architecture are discussed.<>