Retention characteristics of zero-capacitor RAM (Z-RAM) cell based on FinFET and tri-gate devices

Author

Bassin, C. ; Fazan, P. ; Xiong, Wei ; Cleavelin, C.R. ; Schulz, T. ; Schruefer, K. ; Gostkowski, M. ; Patruno, P. ; Maleville, C. ; Nagoga, M. ; Okhonin, S.

Author_Institution

Innovative Silicon, Lausanne, Switzerland

fYear

2005

fDate

3-6 Oct. 2005

Firstpage

203

Lastpage

204

Abstract

In this paper we experimentally study for the first time the retention characteristics of Z-RAM cells based on CMOS FinFET and tri-gate devices. A retention time of few milliseconds is measured at room temperature on 100 nm devices. This FinFET based Z-RAM memory will allow manufacturing of very low cost DRAMs and eDRAMs for 45 and sub 45-nm generations.

Keywords

CMOS integrated circuits; MOSFET; nanotechnology; random-access storage; 100 nm; 45 nm; CMOS FinFET; DRAM; Z-RAM memory cell; eDRAM; tri-gate devices; zero-capacitor RAM cell; CMOS logic circuits; CMOS memory circuits; CMOS technology; FinFETs; Instruments; Nonvolatile memory; Programmable logic arrays; Random access memory; Read-write memory; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 2005. Proceedings. 2005 IEEE International

ISSN

1078-621X

Print_ISBN

0-7803-9212-4

Type

conf

DOI

10.1109/SOI.2005.1563588

Filename

1563588

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2840637