DocumentCode :
2841528
Title :
Effect of preformed IMC layer on electromigration of peripheral ultra fine pitch C2 flip chip interconnection with solder capped Cu pillar bump
Author :
Orii, Yasumitsu ; Toriyama, Kazushige ; Kohara, Sayuri ; Noma, Hirokazu ; Okamoto, Keishi ; Toyoshima, Daisuke ; Uenishi, Keisuke
Author_Institution :
IBM Res. Tokyo, Yamato, Japan
fYear :
2011
fDate :
19-21 Oct. 2011
Firstpage :
206
Lastpage :
209
Abstract :
The electromigration (EM) behavior of 80μm pitch C2 (Chip Connection) interconnection [1,2,3] is studied and discussed. C2 is a low cost, peripheral ultra fine pitch flip chip interconnection technology based on the solder capped Cu pillar bumps. The Cu pillar bumps are formed on Al pads that are commonly used in the wirebonding (WB) technique. It thus makes utmost use of the already existing infrastructure. Because C2 bumps are connected to OSP surface treated Cu pads on an organic substrate by reflow with no-clean process, it has a high throughput and is SMT (Surface Mount Technology) compatible. Since the space between dies and substrates is determined by the Cu pillar height, the collapse control of the solder bump is not required. Also, the pre-solder on substrates is also not required. It is an ideal technology for the systems requiring fine pitch structures. Various reliability tests including the thermal cycle tests and thermal humidity bias tests of C2 technology have already been performed. However, only few investigations have been done on the reliability against the EM failures for this technology. In this report, the EM tests were performed on 80μm pitch C2 flip chip interconnection. The interconnections with two different solder materials were tested: Sn/2.5Ag and Sn100%. The effects of Ni barrier layers on the Cu pillars and the pre-formed intermetallic compound (IMC) layers on the EM tests are studied. The EM test conditions of the test vehicles were 7-10 kA/cm2 at 125-170°C. The Cu pillar height is 45μm and the solder height is 25μm. Aged process for pre-formed IMCs was 2,000 hrs at 150°C. The analysis on the samples after the tests showed that the Cu pillar dissociation occurs only in the electron flow direction. However the polarity dependence of IMC layer growths was not detected. C2 test vehicles with pre-formed IMC layers showed no significant electrical resistance increase during the - est. Also the consumption of Cu atoms was not observed either from the Cu pillars on the dies or from the Cu pads on the substrates for these test vehicles. The Cu pillar dissociations into the solder were less for the pillars with Ni barrier layers than for those without. The results suggest that the formation of the pre-formed IMC layers and the insertion of Ni barrier layers are effective in preventing the Cu atoms from dissociating into the solder. The present study showed a potential ways of forming the Cu pillar joints that are resistant to EM failures.
Keywords :
electromigration; flip-chip devices; integrated circuit interconnections; reliability; solders; surface mount technology; chip connection interconnection; electromigration behavior; intermetallic compound layers; peripheral ultra fine pitch C2 flip chip interconnection; preformed IMC layer; reliability tests; solder capped Cu pillar bump; solder materials; surface mount technology; thermal cycle tests; thermal humidity bias tests; wirebonding technique; Aging; Copper; Flip chip; Joints; Nickel; Substrates; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2011 6th International
Conference_Location :
Taipei
ISSN :
2150-5934
Print_ISBN :
978-1-4577-1387-3
Electronic_ISBN :
2150-5934
Type :
conf
DOI :
10.1109/IMPACT.2011.6117170
Filename :
6117170
Link To Document :
بازگشت