Built-in fault injection in hardware - the FIDYCO example

Experimental fault-injection plays a key role in the process of fault tolerance validation. In this paper we discuss the limitations of conventional experimental setups and investigate how highly complex FPGAs can aid in overcoming these. Based on a thorough analysis of the potential aims of fault-injection experiments we derive a set of conditions for the design of an FPGA-based fault-injection toolset. We present the fault-injection tool FIDYCO as an example implementation of this concept. Our FPGA-based toolset has three main advantages: First, the availability of a physical target system allows to perform experiments in real time. Second, the programmable nature of the FPGA target platform facilitates controllability and observability comparable to that of simulation-based approaches. Third, the tight integration of fault injector and device under test on the same hardware platform allows for a higher precision of fault injection and diagnostic resolution.