Title :
Excitation modes and transient response of a winner-take-all circuit
Author :
Kothapalli, Ganesh
Author_Institution :
Edith Cowan Univ., Perth, WA, Australia
Abstract :
Design and simulation results of CMOS winner-take-all circuit are presented. A 16-cell test circuit has been designed for intended implementation in 0.18 /spl mu/m CMOS process. This paper describes the architecture and design issues related to a CMOS WTA circuit. The proposed circuit has a compact configuration of complexity O(N) where N denotes input count. It seems to be very suitable, especially for charge-based applications where input vectors are generated by a set of charged capacitances. The WTA is a very versatile network. The circuit has the potential to exhibit multiple winners under certain circumstances. This study investigates the dynamics of a WTA network´s behaviour which lead to multiple winner selection.
Keywords :
CMOS integrated circuits; capacitance; circuit complexity; circuit simulation; integrated circuit design; transient response; CMOS WTA circuit; charged capacitance; circuit complexity; circuit simulation; complementary metal oxide semiconductor circuit; excitation modes; input vectors; integrated circuit design; multiple winners; transient response; winner take all circuit; CMOS process; Capacitance; Circuit simulation; Circuit testing; Mirrors; Neural networks; Neurons; Signal processing; Transient response; Voltage;
Conference_Titel :
Electronic Design, Test and Applications, Proceedings. DELTA 2004. Second IEEE International Workshop on
Conference_Location :
Perth, WA, Australia
Print_ISBN :
0-7695-2081-2
DOI :
10.1109/DELTA.2004.10074
