DocumentCode :
2842148
Title :
Analog conversion for FPGA implementation of the TIGER transmitter using a 14 bit DAC
Author :
Salim, T. ; Devlin, J. ; Whittington, J.
Author_Institution :
Dept. of Electron. Eng., La Trobe Univ., Bundoora, Vic., Australia
fYear :
2004
fDate :
28-30 Jan. 2004
Firstpage :
437
Lastpage :
439
Abstract :
FPGA is a potential medium for DSP implementation of direct conversion transmitters and receivers. However analog interface cannot be ruled out since amplification and other tasks are still in the analog domain. In a previous work, input Gaussian pulses are oversampled and filtering operation is performed to generate TIGER output pulses. A fast DAC with word precision of at least 12 bit can provide the required dynamic range (approx. 72dB) for the system. Analog Devices offer a surface mounted device (SMD) DAC with 14 bit word size and is used in this work to produce the analog signals. An analog reconstruction filter follows the DAC outputs to reduce the digital effects of the sampling clock. In this paper we first describe digital effects of a DAC using a simple tone. The spectral distance in digital sampling components can be increased with a digital interpolation filter. This relaxes constraint on Analog Reconstruction Filter (ARF) which can be realized with a few LC components. Visual HDL and Xilinx Tools are used to derive a digital pulse through the DAC.
Keywords :
digital-analogue conversion; field programmable gate arrays; radar transmitters; signal reconstruction; signal sampling; 12 bit; 14 bit; 14 bit DAC; DSP implementation; FPGA implementation; LC components; TIGER transmitter; Xilinx Tools; amplification; analog conversion; analog devices; analog interface; analog reconstruction filter; analog signals; digital interpolation filter; digital pulse; digital sampling; digital signal processor implementation; digital-to-analogue conversion; field programmable gate array implementation; filtering operation; hardware description language; input Gaussian pulses; oversampled; receivers; sampling clock; spectral distance; surface mounted device; visual HDL; Digital filters; Digital signal processing; Dynamic range; Field programmable gate arrays; Filtering; Pulse amplifiers; Pulse generation; Sampling methods; Surface reconstruction; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Design, Test and Applications, Proceedings. DELTA 2004. Second IEEE International Workshop on
Conference_Location :
Perth, WA, Australia
Print_ISBN :
0-7695-2081-2
Type :
conf
DOI :
10.1109/DELTA.2004.10072
Filename :
1409883
Link To Document :
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