DocumentCode :
2842220
Title :
On the limitations of logic testing for detecting Hardware Trojans Horses
Author :
Flottes, Marie-Lise ; Dupuis, Sophie ; Ba, Papa-Sidy ; Rouzeyre, Bruno
Author_Institution :
LIRMM, Univ. Montpellier, Montpellier, France
fYear :
2015
fDate :
21-23 April 2015
Firstpage :
1
Lastpage :
5
Abstract :
The insertion of malicious alterations to a circuit, referred to as Hardware Trojan Horses (HTH), is a threat considered more and more seriously in the last years. Several methods have been proposed in literature to detect the presence of such alterations. Among them, logic testing approaches consist in trying to activate potential HTHs and detect erroneous outputs by exploiting manufacturing digital test techniques. Besides the complexity of this approach due to the intrinsic stealthiness of the potential HTH, we will show that a particular HTH targeting the test infrastructure itself may jeopardize the possibility of detecting any other alterations.
Keywords :
logic testing; security; HTH; digital test technique; erroneous output detection; hardware Trojan horse detection; logic testing approach; malicious alteration; Automatic test pattern generation; Clocks; Hardware; Logic testing; Payloads; Trojan horses; Hardware Trojan; Logic testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2015 10th International Conference on
Conference_Location :
Naples
Type :
conf
DOI :
10.1109/DTIS.2015.7127362
Filename :
7127362
Link To Document :
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