DocumentCode :
2842406
Title :
A Digital Offset Self-Calibration Technique for 3-Bit Flash Converter of an Ultra High-Speed Folding and Interpolating ADC
Author :
Yu, Jinshan ; Zhang, Ruitao ; Lei, Zhang ; Zhang, Zhengping ; Wang, Yonglu ; Can, Zhu ; Zhou, Yu
Author_Institution :
Nat. Lab. of Analog IC´´s, Chongqing, China
Volume :
1
fYear :
2010
fDate :
13-14 Oct. 2010
Firstpage :
11
Lastpage :
13
Abstract :
This paper proposed a digital offset self-calibration technique for the flash converter of an ultra high-speed folding and interpolating ADC. The chip is processed in 0.18-μm CMOS technology. The measured results show that the digital calibration technique can efficiently improve the ADC characteristics.
Keywords :
CMOS integrated circuits; analogue-digital conversion; calibration; CMOS technology; digital offset self-calibration technique; flash converter; interpolating ADC; size 0.18 mum; ultra high-speed folding; word length 3 bit; CMOS integrated circuits; CMOS technology; Calibration; Computer architecture; Converters; Interpolation; Radiation detectors; Ultra High-Speed; analog-to-digital converter; folding; interpolating; wide-bandwidth;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent System Design and Engineering Application (ISDEA), 2010 International Conference on
Conference_Location :
Changsha
Print_ISBN :
978-1-4244-8333-4
Type :
conf
DOI :
10.1109/ISDEA.2010.76
Filename :
5743119
Link To Document :
بازگشت