DocumentCode
2842896
Title
From requirements to specifications
Author
Plock, Cory ; Goldberg, Benjamin ; Zuck, Lenore
Author_Institution
New York Univ., NY, USA
fYear
2005
fDate
4-7 April 2005
Firstpage
183
Lastpage
190
Abstract
Live sequence charts (LSCs) provide a formal visual framework for creating scenario-based requirements for reactive systems. An LSC imposes a partial order over a set of events, such as the sending or receiving of messages. Each event is associated with a liveness property, indicating whether it can or must occur. Time extensions can further specify when these events should occur. An individual LSC tells a story about particular fragment of system behavior, whereas LSC specifications - a finite set of LSCs - collectively define the total behavior. An LSC specification may require that more than one distinct scenario, or multiple instances of the same scenario, execute concurrently. It is natural to ask whether LSC specifications can be synthesized into formal languages. Previous work offers translations from untimed LSCs to finite state machines, and from single (non-concurrent) LSCs to timed automata. Here, we show that LSC specifications with concurrency can also be expressed as a timed automata.
Keywords
finite state machines; formal languages; formal specification; visual languages; finite state machine; formal languages; formal specification; live sequence charts; reactive systems; requirements engineering; timed automata; visual languages; Automata; Concurrent computing; Formal languages; Formal verification; Hardware; Humans; Lighting control; Programming; Time factors; Unified modeling language;
fLanguage
English
Publisher
ieee
Conference_Titel
Engineering of Computer-Based Systems, 2005. ECBS '05. 12th IEEE International Conference and Workshops on the
Print_ISBN
0-7695-2308-0
Type
conf
DOI
10.1109/ECBS.2005.41
Filename
1409916
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