Title :
Methods of eye-pattern window improvement using reflections caused by impedance mismatch: post-emphasis technique
Author :
Yamagishi, K. ; Saito, S.
Author_Institution :
Inf. Technol. R & D Center, Mitsubishi Electr. Corp., Kanagawa, Japan
Abstract :
In this paper, methods of eye-pattern improvement for Gbps class serial signals by waveform emphasis at a receiver are proposed. Intentional impedance mismatch reflections can be caused by inserting high-impedance element between a receiver input with high-impedance connecting to a transmission line and a termination matched to the transmission line. In SPICE simulations at 5Gbps with 1m PCB lines, it is confirmed that eye-pattern window height is improved from 13 % to 66 % and jitter from 0.6UI to 0.075UI.
Keywords :
SPICE; interconnections; printed circuit accessories; transmission lines; 1 m; 5 Gbit/s; PCB lines; SPICE simulations; eye-pattern window height; eye-pattern window improvement; high-impedance element; impedance mismatch reflections; transmission line; waveform emphasis; Distributed parameter circuits; Driver circuits; Equalizers; Frequency; Impedance; Jitter; Joining processes; Power transmission lines; Reflection; Transmission lines;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2005. IEEE 14th Topical Meeting on
Print_ISBN :
0-7803-9220-5
DOI :
10.1109/EPEP.2005.1563739