DocumentCode
2843091
Title
Delay analysis using FDTD for source synchronous interfaces
Author
Hashemi, M.R. ; Mittra, R. ; de Araujo, D.N. ; Cases, M. ; Pham, N. ; Matoglu, E. ; Patel, P. ; Herrman, B.
Author_Institution
Electromagn. Commun. Lab., Pennsylvania State Univ., University Park, PA, USA
fYear
2005
fDate
24-26 Oct. 2005
Firstpage
217
Lastpage
220
Abstract
This paper investigates delay and current return effects utilizing a parallel conformal finite difference time domain (PFDTD) method [Wenhua Yu, 2003]. Methodology, modeling, and integration to system level simulation for several interconnect structures are presented.
Keywords
delays; finite difference time-domain analysis; integrated circuit interconnections; integrated circuit modelling; current return effects; delay analysis; delay return effects; finite difference time domain method; interconnect structures; parallel conformal method; source synchronous interfaces; system level simulation; Clocks; Delay effects; Finite difference methods; Frequency; Impedance; Packaging; Stripline; Testing; Time domain analysis; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2005. IEEE 14th Topical Meeting on
Print_ISBN
0-7803-9220-5
Type
conf
DOI
10.1109/EPEP.2005.1563741
Filename
1563741
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