• DocumentCode
    2843529
  • Title

    Determination of silicon die initial crack using acoustic emission technique

  • Author

    Chen, Pei-Chi ; Su, Yen-Fu ; Yang, Shin-Yueh ; Chiang, Kuo-Ning

  • Author_Institution
    Dept. of Power Mech. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
  • fYear
    2011
  • fDate
    19-21 Oct. 2011
  • Firstpage
    83
  • Lastpage
    86
  • Abstract
    Three-dimensional chip stacking packaging has become increasingly popular in the electronic packaging industry because of the present market demand on high performance, high capacity and small form factor products. As a result, silicon wafers have to be ground through wafer-thinning processes to achieve greater packaging density. However, induction of cracks on the chips during stacking process or with the use of a device is possible. Therefore, the current research aims to determine the maximum allowable force on a (1 0 0) silicon die using ball-breaker test with an acoustic emission (AE) system. To compare with the experiment data, the finite element analysis was employed using commercial software ANSYS/LS-DYNA3D® to determine the silicon die strength. The results show that the maximum allowable force for a 30 mm × 30 mm × 0.2 mm (1 0 0) silicon is 14.42 N. The value was introduced to simulation to determine the strength of silicon die. The strength of silicon die is 618 MPa, which is lower than that obtained from a previous research that conducted the ball-breaker test without an AE system, the allowable strength is defined as when silicon is fully cracked. The advantage of the method developed in this research is the AE system could detect the failure instantly and obtain the event of initial cracking. The modified ball-breaker test could avoid an overestimation in determining the die strength.
  • Keywords
    acoustic emission testing; chip scale packaging; cracks; electronics packaging; finite element analysis; silicon; wafer level packaging; acoustic emission technique; ball-breaker test; commercial software ANSYS/LS-DYNA3D; electronic packaging; finite element analysis; packaging density; silicon die initial crack determination; silicon wafer; three-dimensional chip stacking packaging; wafer-thinning process; Computational modeling; Finite element methods; Force; Packaging; Silicon; Stress; Acoustic emission system; Ball-breaker test; Finite element analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2011 6th International
  • Conference_Location
    Taipei
  • ISSN
    2150-5934
  • Print_ISBN
    978-1-4577-1387-3
  • Electronic_ISBN
    2150-5934
  • Type

    conf

  • DOI
    10.1109/IMPACT.2011.6117283
  • Filename
    6117283