Design of Low Power, High Performance FIR Filter Using Modified Differential Evolution Algorithm

Author

Reddy, K.S. ; Bharath, M.S. ; Sahoo, S.K. ; Sinha, S. ; Reddy, J.P.

Author_Institution

Dept. of Electr. & Electron. Eng., Birla Inst. of Technol. & Sci., Pilani, India

fYear

2011

fDate

19-21 Dec. 2011

Firstpage

62

Lastpage

66

Abstract

In digital filters, maximum power consumption occurs during multiplication operations. Hence, to reduce power consumption, the number of multiplications has to be minimized. The number of Signed-Power-of-Two (SPT) terms in the filter coefficients has to be optimally minimized, without compromising on the filter response. A modified Differential Evolution (MDE) algorithm has been used to generate optimized coefficients for digital FIR filters. The filters designed using MDE and the standard Remez (REM) Exchange method are synthesized in 90nm technology and their performances are compared. The critical delay, area and power of MDE implementation are found to improve by 6%, 12% and 16%respectively with respect to REM.

Keywords

FIR filters; circuit optimisation; evolutionary computation; low-power electronics; multiplying circuits; network synthesis; MDE algorithm; REM exchange method; SPT terms; critical delay; digital FIR filters; filter coefficients; low power high performance FIR filter design; modified differential evolution algorithm; multiplication operations; power consumption reduction; signed-power-of-two terms; size 90 nm; standard Remez exchange method; Adders; Algorithm design and analysis; Filtering algorithms; Finite impulse response filter; Hardware; Vectors; Differential Evolution Algorithm; FIR filter; Remez Algorithm; SPT;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic System Design (ISED), 2011 International Symposium on

Conference_Location

Kochi, Kerala

Print_ISBN

978-1-4577-1880-9

Type

conf

DOI

10.1109/ISED.2011.58

Filename

6117327