DocumentCode
2844518
Title
Design and Verification of Multi-clock Domain Synchronizers
Author
Luo, Li ; He, Hongjun ; Dou, Qiang ; Xu, Weixia
Author_Institution
Sch. of Comput., Nat. Univ. of Defense Technol., Changsha, China
Volume
1
fYear
2010
fDate
13-14 Oct. 2010
Firstpage
544
Lastpage
547
Abstract
Clock domain crossing (CDC) is an important issue in integrated circuit (IC) design and verification. In this paper, We present the design of 5 types of CDC schemes in our developed SOC chip with multi working mode and ten clock domain, deeply describe an approach using assertion-based verification (ABV) to verify proper functionality for CDC signals. Taped sample chip tests show all CDC designs work right, and demonstrate that design and verification method are effective.
Keywords
formal verification; integrated circuit design; synchronisation; system-on-chip; CDC scheme; SOC chip; assertion based verification; clock domain crossing; integrated circuit design; integrated circuit verification; multiclock domain synchronizer; multiworking mode; taped sample chip test; Clocks; Flip-flops; Jitter; Protocols; Synchronization; System-on-a-chip; PSL (Property Specification Language); assertion-based verification; clock domain crossing design; synchronizer;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent System Design and Engineering Application (ISDEA), 2010 International Conference on
Conference_Location
Changsha
Print_ISBN
978-1-4244-8333-4
Type
conf
DOI
10.1109/ISDEA.2010.288
Filename
5743240
Link To Document