DocumentCode
2845946
Title
Microdegree frequency and phase difference control using fractional-N PLL synthesizers
Author
Gray, Blake ; Masood, Mir ; Galloway, Jeff ; Caplan, Rand Y. ; Kenney, J. Stevenson
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2012
fDate
17-22 June 2012
Firstpage
1
Lastpage
3
Abstract
Two independently programmable on-chip delta-sigma fractional-N phased-locked loop (PLL) synthesizers were developed in 65 nm CMOS with a total die size of 2 mm × 2 mm to demonstrate a millidegree phase shifter. Both PLLs use a 24 bit fractional modulator, thus a theoretical phase shift as small as 21 microdegrees is possible. Due to limitations in the noise floor at microwave frequencies, data was collected at postdivided frequencies 50 MHz and 400 MHz resulting in a best case measured phase step of 21 millidegrees at 50 MHz with a high degree of measurement certainty.
Keywords
CMOS integrated circuits; delta-sigma modulation; frequency synthesizers; phase locked loops; programmable circuits; CMOS; fractional modulator; fractional-N PLL synthesizers; frequency 400 MHz; frequency 50 MHz; microdegree frequency; microwave frequencies; millidegree phase shifter; noise floor; phase difference control; programmable on-chip delta-sigma fractional-N phased-locked loop synthesizers; size 65 nm; theoretical phase shift; CMOS integrated circuits; Hardware design languages; Lead; Phase measurement; Fractional-N frequency synthesizers; phase control; phase-locked loops (PLLs);
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest (MTT), 2012 IEEE MTT-S International
Conference_Location
Montreal, QC
ISSN
0149-645X
Print_ISBN
978-1-4673-1085-7
Electronic_ISBN
0149-645X
Type
conf
DOI
10.1109/MWSYM.2012.6258342
Filename
6258342
Link To Document