DocumentCode
2846801
Title
CMOS distributed amplifier design using CAD optimization techniques
Author
Allstot, David J. ; Ballweber, Brian M. ; Gupta, Ravi
Author_Institution
Dept. of Electr. Eng., Arizona State Univ., Tempe, AZ, USA
fYear
1999
fDate
1999
Firstpage
140
Lastpage
146
Abstract
A four-stage distributed amplifier exhibits 6.5 dB gain, 5.5 GHz bandwidth, and 80 mW power dissipation from a 3 V supply in 0.6 μm CMOS. Scalable inductor models and custom CAD tools optimize performance
Keywords
CMOS analogue integrated circuits; MMIC amplifiers; circuit CAD; circuit optimisation; distributed amplifiers; field effect MMIC; integrated circuit design; simulated annealing; wideband amplifiers; 0.6 micron; 3 V; 5.5 GHz; 6.5 dB; 80 mW; CAD optimization techniques; CMOS distributed amplifier design; MOMENTUM planar EM simulator; custom CAD tools; four-stage distributed amplifier; inductor modelling; scalable inductor models; Bandwidth; Design automation; Design optimization; Distributed amplifiers; Geometry; Inductance; Inductors; Packaging; Radiofrequency integrated circuits; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on
Conference_Location
Tucson, AZ
Print_ISBN
0-7803-5510-5
Type
conf
DOI
10.1109/SSMSD.1999.768607
Filename
768607
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