Protecting Router Forwarding Table in Space

SRAM-based FPGA is more sensitive to multiple bit upset, and the possibility of accumulation of memory´s upset is high. In order to improve the ability that SRAM-based FPGA is more stable to multiple upset, this paper presents a new type design of multiple errors correction. The design combines BCH(15,7) code which can correct two errors and the improved TMR technology and achieves detecting and correcting multiple bit upset. Compared with the classical Hamming codes and extended Hamming codes, it has the advantage of correcting multiple bit upset. And compared with the traditional TMR, it can effectively determine the validity of the data after voting. Meanwhile, the design writes back the right data when error happens to avoid the accumulation of errors.