• DocumentCode
    2847587
  • Title

    Microprocessor Modeling and Simulation with SystemC

  • Author

    Lu, Yen-Ju ; Lin, Chen-Tung ; Wu, Chi-Feng ; Hwang, Shih-Arn ; Lin, Ying-Hsi

  • Author_Institution
    Realtek Semicond. Corp., Hsinchu
  • fYear
    2007
  • fDate
    25-27 April 2007
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Complexity of advanced chip designs is driving the progress of ESL methodology. SystemC, with its mature C++ language environment and the availability of public tools, is quickly becoming the de facto ESL language. In this paper, we demonstrate the methodology by microprocessor modeling with systemC. Various abstraction levels and the corresponding purposes are addressed. The advantage of ESL methodology is shown by the experimental results of simulation speed. With a 18 times to over 500 times simulation speed-up, the methodology has proved useful in modeling, verification, and software development.
  • Keywords
    C++ language; microprocessor chips; software engineering; C++ language environment; ESL methodology; chip designs; microprocessor modeling; software development; systemC; Chip scale packaging; Computer architecture; Hardware design languages; High level languages; Mathematical model; Microprocessors; Pipelines; Process design; Signal design; Software algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, Automation and Test, 2007. VLSI-DAT 2007. International Symposium on
  • Conference_Location
    Hsinchu
  • Print_ISBN
    1-4244-0583-1
  • Electronic_ISBN
    1-4244-0583-1
  • Type

    conf

  • DOI
    10.1109/VDAT.2007.373197
  • Filename
    4239389