DocumentCode
2847894
Title
Mixed Hardware Software Multilevel Modeling and Simulation for Multithreaded Heterogeneous MPSoC
Author
Popovici, Katalin ; Guerin, Xavier ; Brisolara, Lisane ; Jerraya, Ahmed
Author_Institution
TIMA Lab., Grenoble
fYear
2007
fDate
25-27 April 2007
Firstpage
1
Lastpage
4
Abstract
In this paper, we introduce a mixed hardware -software architecture model to abstract hardware-software interfaces of multithreaded heterogeneous multiprocessor architecture with specific hardware I/O. We use Simulink environment as modeling language to capture this representation. We generate two intermediate simulation models called Virtual Architecture and Transaction Accurate to validate the software during the different design steps. The software refinement is performed by automatic software code generation for parallel application from Simulink model, and automatic low level software customization for specific architecture. Through experiments we show the efficiency of the proposed design flow that decreases design time without affecting design quality.
Keywords
hardware-software codesign; parallel programming; software architecture; system-on-chip; Simulink environment; automatic software code generation; mixed hardware software multilevel modeling; mixed hardware-software architecture model; modeling language; multithreaded heterogeneous MPSoC; parallel application; software customization; virtual architecture; Application software; Computer architecture; Concurrent computing; Embedded software; Embedded system; Hardware; Software architecture; Software design; Software performance; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, Automation and Test, 2007. VLSI-DAT 2007. International Symposium on
Conference_Location
Hsinchu
Print_ISBN
1-4244-0583-1
Electronic_ISBN
1-4244-0583-1
Type
conf
DOI
10.1109/VDAT.2007.373215
Filename
4239407
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