• DocumentCode
    2848044
  • Title

    Integrated MOS analog delay line

  • Author

    Mao, Rui ; Keller, Kerstin ; Ahrons, R.

  • Author_Institution
    RCA Electronic Components, Somerville, N.J., USA
  • Volume
    XII
  • fYear
    1969
  • fDate
    19-21 Feb. 1969
  • Firstpage
    164
  • Lastpage
    165
  • Abstract
    An analog fixed or variable delay line using P-channel MOS field-effect transistors has been monolithically fabricated on silicon. This paper will describe sample-and-hold operation, design considerations, properties, and applications of this integrated circuit.
  • Keywords
    Capacitors; Circuits; Delay lines; Equations; Frequency; MOS devices; Magnetic separation; Sampling methods; Signal design; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1969 IEEE Internationa
  • Conference_Location
    Philadelphia, PA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1969.1154730
  • Filename
    1154730
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2848044