DocumentCode :
2848068
Title :
IGFET circuit performance: N-channel vs P-channel
Author :
Cheroff, G. ; Critchlow, D. ; Dennard, R. ; Terman, L.
Author_Institution :
IBM Corp., Hopewell Junction, N.Y., USA
Volume :
XII
fYear :
1969
fDate :
19-21 Feb. 1969
Firstpage :
180
Lastpage :
181
Abstract :
Previous circuit performance comparisons between N-channel and P-channel IGFETs have not considered the control of device performance with substrate bias. These factors will be described and the resulting performance advantages of N-channel devices illustrated for a memory chip.
Keywords :
Capacitance; Circuit optimization; Delay; Doping; Insulation; Power dissipation; Pulse measurements; Silicon; Switches; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1969 IEEE Internationa
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1969.1154731
Filename :
1154731
Link To Document :
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