Title :
A 4-Bit, 13.5GSample/sec Track-and-Hold Circuit
Author :
Wang, I-Hsin ; Liu, Shen-Iuan
Author_Institution :
Nat. Taiwan Univ., Taipei
Abstract :
With the channel length scaled down in CMOS process technology, the clock feedthrough will degrade the performance of a high-speed track-and-hold (T/H) circuit due to the thin-oxide gate leakage and parasitic overlapping capacitance. A 13.5 GSample/sec CMOS T/H circuit with clock feedthrough and charge injection cancellation is proposed. This T/H circuit has been fabricated in 90 nm CMOS process. It achieves 4-bit resolution from 250 MHz to 5 GHz analog input signal at 13.5 GSample/sec and dissipates 89 mW from single IV supply voltage.
Keywords :
CMOS integrated circuits; charge injection; sample and hold circuits; CMOS process technology; charge injection cancellation; frequency 250 MHz to 5 GHz; high-speed track-hold circuit; parasitic overlapping capacitance; size 90 nm; thin-oxide gate leakage; word length 4 bit; CMOS process; CMOS technology; Capacitors; Circuits; Clocks; Gate leakage; Parasitic capacitance; Sampling methods; Switches; Voltage;
Conference_Titel :
VLSI Design, Automation and Test, 2007. VLSI-DAT 2007. International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
1-4244-0583-1
Electronic_ISBN :
1-4244-0583-1
DOI :
10.1109/VDAT.2007.373231
