Title :
A high-performance monolithic store
Author :
Ayling, J. ; Moore, R. ; Tu, Guojie
Author_Institution :
IBM Corp., Poughkeepsie, NY, USA
Abstract :
A 40-ns access bipolar monolithic memory of 2021 words × 144 bits capacity has been developed and incorporated in a computing system. The design and structure of a 64-bit silicon chip will be presented and some aspects of the organization and circuit design discussed.
Keywords :
Capacitance; Circuits; Decoding; Delay; Impedance; Logic; Resistors; Signal design; Switches; Wiring;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1969 IEEE Internationa
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1969.1154746