Title :
30-circuit monolithic chip with 750-PS loaded-circuit delay per stage
Author :
Dhaka, V. ; Langdon, Jonathan ; Vanderveer, E. ; Chen, Ci ; Oberai, A. ; Sechler, R. ; Wu, Bin
Author_Institution :
IBM Corp., Hopewell Junction, NY, USA
Abstract :
A high-speed 30-circuit silicon chip using non-saturating emitter-coupled logic circuits with 750-ps loaded delay per stage using 3-level metalization will be described. The chip contains 210 transistors and 196 resistors.
Keywords :
Coupling circuits; DH-HEMTs; Delay effects; Impedance; Integrated circuit interconnections; Latches; Logic circuits; Resistors; Silicon; Switches;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1969 IEEE Internationa
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1969.1154764
