Title :
AMI: A new thin film substrate technology
Author :
Hurwitz, D. ; Igner, E. ; Yofis, B. ; Katz, D.
Author_Institution :
Div. of Adv. Multilayer Interconnect, PCB Ltd., USA
Abstract :
An advanced multilayer interconnect (AMI) technology has been developed. This technology offers high density and low cost multilayer substrates for use in build-up MCM-D/L layers and chip scale packages (CSPs). In the AMI manufacturing process, the multilayer is built up on a planarized substrate material, using nonphotosensitive benzocyclobutene (BCB) as an insulator, and micro-filled aluminum vias. Four major steps are involved in the AMI process: (1) aluminum deposition over a planarized base material; (2) selective conversion of the deposited aluminum oxide, thereby creating lines and via posts; (3) replacement of the previously formed aluminum oxide by BCB; (4) mechanical polishing of the coated BCB to expose the top surface of the aluminum via posts. Steps 1 to 4 are repeated until the required number of layers is achieved. A detailed description of the AMI process steps is given. The key processes of metal deposition, adhesion enhancement, anodization and mechanical polishing are discussed. Reliability test data, typical key features and the electrical performance of an AMI prototype are presented. Particularly noteworthy are the advantages offered by the AMI structure: low production cost and large area panel (LAP) processing capabilities; superior planarity provides higher production yield and facilitates flip chip attachment; high density interconnectivity through the use of stacked and padless via posts; outstanding thermal and electrical properties through the use of filled aluminum vias
Keywords :
adhesion; anodisation; integrated circuit interconnections; integrated circuit metallisation; integrated circuit packaging; integrated circuit reliability; laminates; multichip modules; oxidation; polishing; polymer films; surface topography; AMI manufacturing process; AMI process steps; AMI thin film substrate technology; Al; Al-Al2O3; CSPs; adhesion enhancement; advanced multilayer interconnect technology; aluminum deposition; aluminum oxide replacement; aluminum via post top surface exposure; anodization; build-up MCM-D layers; build-up MCM-D/L layers; build-up MCM-L layers; chip scale packages; coated BCB; electrical performance; electrical properties; filled aluminum vias; flip chip attachment; high density interconnectivity; high density multilayer substrates; interconnect lines; large area panel processing; mechanical polishing; metal deposition; micro-filled aluminum vias; multilayer substrates; nonphotosensitive benzocyclobutene insulator; planarity; planarized base material; planarized substrate material; production cost; production yield; reliability test; selective aluminum oxide conversion; stacked padless via posts; thermal properties; via posts; Aluminum oxide; Ambient intelligence; Chip scale packaging; Costs; Insulation; Manufacturing processes; Nonhomogeneous media; Production; Substrates; Transistors;
Conference_Titel :
Multichip Modules and High Density Packaging, 1998. Proceedings. 1998 International Conference on
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-4850-8
DOI :
10.1109/ICMCM.1998.670762