Compact modeling of interconnect reliability

Electromigration (EM) is one of the major reliability issues for modern integrated circuits. EM normally triggers a chip failure due to formation and growth of voids in a metal line of the interconnect structure. In order to investigate the failure mechanisms, EM experiments are performed under accelerated conditions, where an interconnect line is stressed with a higher current density and at a higher temperature than those under typical use conditions. Then, for the estimation of the interconnect lifetime under a real operating condition the times to failure (TTF) obtained from the accelerated tests have to be extrapolated to the use current density and temperature. A correct description and an adequate extrapolation procedure are, therefore, a must for a correct reliability assessment regarding EM failures.