DocumentCode
2848757
Title
Regular processor arrays for matrix algorithms with pivoting
Author
Roychowdhury, V.P. ; Kailath, T.
Author_Institution
Inf. Syst. Lab., Stanford Univ., CA, USA
fYear
1988
fDate
25-27 May 1988
Firstpage
237
Lastpage
246
Abstract
It is shown how to obtain regular (though nonsystolic) processor arrays for algorithms with pivoting. First, the fact that pivoting algorithms cannot be systolic is established. Then it is shown how regular iterative algorithms can be formulated for the Gaussian elimination algorithm with partial pivoting and how the algorithm can then be implemented on the so-called regular iterative arrays (locally connected arrays of essentially identical processor modules, with register pipelines and/or LIFO (last-in/first-out) buffers in some of the links).<>
Keywords
computational geometry; parallel processing; Gaussian elimination algorithm; LIFO; locally connected arrays; matrix algorithms; pivoting; register pipelines; regular iterative algorithms; regular processor arrays; Contracts; Design methodology; Graph theory; Information systems; Iterative algorithms; Laboratories; Linear algebra; Pipelines; Registers; Systolic arrays;
fLanguage
English
Publisher
ieee
Conference_Titel
Systolic Arrays, 1988., Proceedings of the International Conference on
Conference_Location
San Diego, CA, USA
Print_ISBN
0-8186-8860-2
Type
conf
DOI
10.1109/ARRAYS.1988.18064
Filename
18064
Link To Document