• DocumentCode
    2848893
  • Title

    The derivation of regular synchronous circuits

  • Author

    Luk, Wayne ; Jones, Geraint

  • Author_Institution
    Comput. Lab., Oxford Univ., UK
  • fYear
    1988
  • fDate
    25-27 May 1988
  • Firstpage
    305
  • Lastpage
    314
  • Abstract
    An approach to derive parameterized representations of regular synchronous circuits from their specification is presented. The derivation of designs consists of two steps: rewriting the specification in terms of predefined structures to obtain a draft architecture, and optimizing that architecture by successive correctness-preserving transformations using algebraic theorems. These steps can be repeated to obtain, at a lower level of abstraction, architectures that still satisfy the original specification. A number of word-level and bit-level rank evaluator designs are developed to illustrate the techniques describes.<>
  • Keywords
    VLSI; cellular arrays; circuit CAD; algebraic theorems; bit-level rank evaluator designs; draft architecture; parameterized representations; regular synchronous circuits; successive correctness-preserving transformations; Adders; Circuits; Computer architecture; Design optimization; Logic; Pipelines; Process design; Signal design; Signal processing; Systolic arrays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Systolic Arrays, 1988., Proceedings of the International Conference on
  • Conference_Location
    San Diego, CA, USA
  • Print_ISBN
    0-8186-8860-2
  • Type

    conf

  • DOI
    10.1109/ARRAYS.1988.18071
  • Filename
    18071