Title :
1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers [front cover]
Abstract :
Presents the front cover of the proceedings record.
Keywords :
circuit layout CAD; logic CAD; BIST; CAD frameworks; DFT; DSP synthesis; Steiner routing algorithms; VHDL; analog synthesis; array fault diagnosis; asynchronous design; cell layout; circuit simulation; compaction; decomposition; device simulation; fault simulation; finite state machine synthesis; heuristic routers; high level synthesis; high-performance ATPG; integrated circuit planning; iterative techniques; layout algorithms; layout extraction; logic optimization; manufacturability; module generation; parallel routing; placement; reliability; river routing algorithms; sequential circuit testing; symbolic evaluation; testability; timing simulation; verification; wafer routing; yield enhancement;
Conference_Titel :
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-1986-4
DOI :
10.1109/ICCAD.1989.76891
