Title :
An integrated circuit layout design program based on a graph-theoretical approach
Author :
Sugiyama, N. ; Nemoto, Shunsuke ; Kani, K. ; Ohtsuki, Tomoaki ; Watanabe, Hiromi
Author_Institution :
Nippon Electric Co., Ltd., Tokyo, Japan
Abstract :
A graph-theoretical method, with wiring and placement problems considered simultaneously, will be discussed. The approach has resulted in the development of a computer program affording automatic layout design of single-layer IC chips on smallest possible areas.
Keywords :
Application software; Bonding; Bridge circuits; Circuit theory; Graph theory; Integrated circuit layout; Resistors; Silicon; Testing; Wiring;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1970 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1970.1154803
