DocumentCode
2849457
Title
The Future of Charge Trapping Memories
Author
Mikolajick, T. ; Specht, M. ; Nagel, N. ; Mueller, T. ; Riedel, S. ; Beug, F. ; Melde, T. ; Küsters, K.H.
Author_Institution
Tech. Univ. of Freiberg, Freiberg
fYear
2007
fDate
23-25 April 2007
Firstpage
1
Lastpage
4
Abstract
Floating gate memory cells running into scaling limitations caused by reduced gate coupling and excessive floating gate interference, charge trapping in its two variants multi bit charge trapping and charge trapping NAND is the most promising technology for the mid term. For NOR type applications also phase change RAM could appear as a competitor in a few years, but some considerable development is still down the road. Concepts to challenge NAND type applications are still in the early stage. Therefore charge trapping is expected to be the technology of choice for code storage in the short to mid term and for data storage in the mid term timeframe.
Keywords
NAND circuits; NOR circuits; electron traps; integrated logic circuits; integrated memory circuits; random-access storage; NOR type applications; charge trapping NAND; charge trapping memories; floating gate interference; floating gate memory cells; gate coupling reduction; multibit charge trapping; phase change RAM; EPROM; Electron traps; Flash memory; Hot carriers; Interference; Material storage; Nonvolatile memory; Silicon; Transistors; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems and Applications, 2007. VLSI-TSA 2007. International Symposium on
Conference_Location
Hsinchu
ISSN
1524-766X
Print_ISBN
1-4244-0584-X
Electronic_ISBN
1524-766X
Type
conf
DOI
10.1109/VTSA.2007.378943
Filename
4239511
Link To Document