Asymmetrical SRAM Cells with Enhanced Read and Write Margins

In this paper, we describe technology methods to improve the read stability (or static noise margin (SNM)) of asymmetrical SRAM cell based on judicious placement of a weakened pull-down device (NL) in the cell. The core concept is to further weaken the strength of NL through device design and technology/process means beyond that achievable by the conventional device sizing or circuit scheme, thus achieving Read SNM comparable to the standby SNM. These methods improve/maximize the SNM of asymmetrical SRAM cell without degrading read/write performance, leakage/dynamic power, and area/density. They are also more scalable for low voltage operations. Write margin and performance can be noticeably improved by further device optimization.