Title :
A low power cryogenic CMOS ROIC for 512×512 infrared focal plane array
Author :
Zhao, Hongliang ; Zhao, Yiqiang ; Song, Yiwei ; Liao, Jun ; Geng, Junfeng
Abstract :
A low power cryogenic readout integrated circuit (ROIC) for mid- and far-wave infrared focal plane array (FPA) is presented as a prototype for 512×512 image system. By applying capacitive trans-impedance amplifier (CTIA) with inherent correlated double sampling (CSD) structure, a high performance readout interface circuit for the infrared FPA is realized with a pixel size of 30×30 μm2. Optimized column readout timing and two operating modes in column amplifiers are used to reduce the power consumption. The readout chip designed by Chartered 0.35 μm 2P4M process shows more than 10 MHz readout rate and less than 70 mW power consumption under 3.3 V supply voltage at 77 K to 150 K operating temperature. And it occupies an area of 18.4×17.5 mm2.
Keywords :
CMOS image sensors; infrared imaging; operational amplifiers; readout electronics; 2P4M process; CSD structure; CTIA; capacitive transimpedance amplifier; column amplifiers; correlated double sampling structure; far-wave infrared focal plane array; high performance readout interface circuit; image system; infrared FPA; infrared focal plane array; low power cryogenic CMOS ROIC; low power cryogenic readout integrated circuit; mid-wave infrared focal plane array; optimized column readout timing; power consumption; size 0.35 mum; temperature 77 K to 150 K; voltage 3.3 V; Arrays; Cryogenics; Power demand; Power dissipation; Switches; Timing; cryogenic electronics; focal plane array; infrared readout integrated circuit; low power;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of
Conference_Location :
Tianjin
Print_ISBN :
978-1-4577-1998-1
Electronic_ISBN :
Pending
DOI :
10.1109/EDSSC.2011.6117641
